1. Field of the Invention
The present invention relates to digital components employed in an improved high speed digital demodulator. More particularly, the present invention relates to a novel digital matched filter and novel error detector useful to increase the operational speed of a digital demodulator.
2. Description of the Prior Art
Heretofore, digital demodulators were known. Our U.S. Pat. No. 5,099,494 shows and describes a Six Channel Digital Demodulator that has been reduced to practice on a single semiconductor chip. This chip incorporates our Digital Phase Shifter shown in our U.S. Pat. No. 4,841,522 and our Variable Rate Rectangular Matched Filter shown in our U.S. Pat. No. 4,808,939.
This prior art digital demodulator and other prior art direct sequence spread spectrum (DSSS) systems that employ digital signal processing require that the chipping rate be equal to, or less than the system clock rate of the digital circuitry. The maximum digital system clock rate is limited by the maximum operational speed of the digital components in the system, which in turn are limited by the complexity of the components and the type of semiconductor devices which limits their logic speed.
It would be desirable to provide a novel digital demodulator whose fundamental signal processing rate does not limit the chipping rate to the digital systems' clock rate.